cxgb4: Fix endianness issue in t4_fwcache()

Do not put host-endian 0 or 1 into big endian feild.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index c28a1d8b7f33165ceaf9edbdf677ba1063c4b9e8..f85eab57e9e1dccba2b052f1e65b6e6de9b414f3 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -3889,7 +3889,7 @@ int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op)
        c.param[0].mnem =
                cpu_to_be32(FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
                            FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWCACHE));
-       c.param[0].val = (__force __be32)op;
+       c.param[0].val = cpu_to_be32(op);
 
        return t4_wr_mbox(adap, adap->mbox, &c, sizeof(c), NULL);
 }