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(parent: 9d0394c) | patch
drm/nouveau/fifo/gk104: fix chid bit mask
authorXia Yang <xiay@nvidia.com>
Thu, 25 Feb 2016 08:59:08 +0000 (17:59 +0900)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 14 Mar 2016 00:13:30 +0000 (10:13 +1000)
commit0689aad70d719842c3a07f5782b7d35bb12efe9d
tree74ae1433a9d3923472ba49d47a57a31c0a352de4tree | snapshot
parent9d0394c6bed5b4b78167cc0eea294754a9cb2bbccommit | diff
drm/nouveau/fifo/gk104: fix chid bit mask

Fix the channel id bit mask in FIFO schedule timeout error handling.

FIFO_ENGINE_STATUS_NEXT_ID is bit 27:16 thus 0x0fff0000.
FIFO_ENGINE_STATUS_ID      is bit 11:0  thus 0x00000fff.

Signed-off-by: Xia Yang <xiay@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c diff | blob | history
https://github.com/torvalds/linux.git