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(parent: 3f7759e) | patch
drm/msm: Only enable A6xx LLCC code on A6xx
authorKonrad Dybcio <konrad.dybcio@somainline.org>
Mon, 4 Jan 2021 19:30:41 +0000 (20:30 +0100)
committerRob Clark <robdclark@chromium.org>
Thu, 7 Jan 2021 17:23:05 +0000 (09:23 -0800)
commit00fd44a1a4700718d5d962432b55c09820f7e709
tree8cc488f54d5e6f90172068c937fdc058b1644366tree | snapshot
parent3f7759e7b7585a0bffda06d4eddc6b0b850ef6c3commit | diff
drm/msm: Only enable A6xx LLCC code on A6xx

Using this code on A5xx (and probably older too) causes a
smmu bug.

Fixes: 474dadb8b0d5 ("drm/msm/a6xx: Add support for using system cache(LLC)")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/adreno_gpu.c diff | blob | history
drivers/gpu/drm/msm/adreno/adreno_gpu.h diff | blob | history
https://github.com/torvalds/linux.git